CXMT capacity estimate closes in on Micron — China could reach 1.41 million monthly DRAM wafer starts
TL;DR
Research models put CXMT at 350,000 monthly wafer starts by end-2026, close to Micron.
A new threshold is within reach: research models estimate that ChangXin Memory Technologies (CXMT) will reach 350,000 DRAM wafer starts per month by the end of 2026, only 25,000 below Micron's 375,000. These are Citrini Research model estimates, not company guidance from CXMT. SemiAnalysis separately estimates Micron at roughly 385,000, with both models placing CXMT close to Micron by wafer capacity.
Matching Micron wafer capacity would not mean that CXMT has matched its bit output, process capability, or product mix. SemiAnalysis said CXMT's DDR5 cost per bit remains more than 30% above Samsung, SK Hynix, and Micron. About 99% of CXMT's 2025 sales came from DDR and LPDDR, while roughly 5,000 monthly wafer starts were allocated to HBM.
Citrini's model estimates total Chinese DRAM capacity at 1.41 million wafer starts per month by 2030, including 950,000 at CXMT, 120,000 at JHICC, 140,000 at Swaysure, and 200,000 at YMTC subsidiary XMC. The model assigns about 400,000 CXMT wafers to D1a, 400,000 to D1b, and 150,000 to D1c.
Expansion still depends on semiconductor equipment. Tom's Hardware identified 193nm immersion DUV scanners as a near-term constraint; tighter export controls would stop planned fabs from opening on schedule. CXMT's listing documents do not provide these targets: 350,000, 950,000, and 1.41 million are research-model figures.
via Tom's Hardware / SemiAnalysis
Matching Micron wafer capacity would not mean that CXMT has matched its bit output, process capability, or product mix. SemiAnalysis said CXMT's DDR5 cost per bit remains more than 30% above Samsung, SK Hynix, and Micron. About 99% of CXMT's 2025 sales came from DDR and LPDDR, while roughly 5,000 monthly wafer starts were allocated to HBM.
Citrini's model estimates total Chinese DRAM capacity at 1.41 million wafer starts per month by 2030, including 950,000 at CXMT, 120,000 at JHICC, 140,000 at Swaysure, and 200,000 at YMTC subsidiary XMC. The model assigns about 400,000 CXMT wafers to D1a, 400,000 to D1b, and 150,000 to D1c.
Expansion still depends on semiconductor equipment. Tom's Hardware identified 193nm immersion DUV scanners as a near-term constraint; tighter export controls would stop planned fabs from opening on schedule. CXMT's listing documents do not provide these targets: 350,000, 950,000, and 1.41 million are research-model figures.
via Tom's Hardware / SemiAnalysis
