Apple A20: first 2nm Apple Silicon, DRAM moves off-stack for thermals, 96-bit LPDDR6
TL;DR
Leaks show Apple's A20 will be the first 2nm Apple Silicon, repackaging DRAM to the side of the SoC (WMCM) for thermals, and jumping to 96-bit LPDDR6.
Wccftech and AppleInsider published fresh A20 / A20 Pro engineering details on June 26. Headline: TSMC 2nm N2 — the first 2nm Apple Silicon — plus WMCM (Wafer-Level Multi-Chip Module) packaging that moves DRAM from on top of the SoC (the old PoP stack used since A11) to a side-by-side layout on the same wafer. The memory interface jumps from LPDDR5X 64-bit to LPDDR6 96-bit.
The packaging change matters more than the node. PoP saved board area but trapped heat above the CPU/GPU — the iPhone 15 Pro thermal complaints and iPhone 16 Pro gaming throttle came from that wall. With WMCM, the heatspreader sits directly on the SoC, no DRAM in between.
Bandwidth roughly doubles — from ~50–60 GB/s (A19) to ~90 GB/s (A20). The reason isn't speculation: Apple Intelligence on-device models, Visual Search inference, and the new SystemVoiceAssistant in iOS 27 Beta 2 are all memory-bandwidth bound. For comparison, the leaked M6 base sits at 200 GB/s — a phone chip is closing on M3 territory.
Jeff Pu's numbers: ~15% faster, ~30% lower power than A19. The Neural Engine grows, with NPU area share climbing while package size stays the same.
The chain through the week is consistent: Apple skips M6 Pro/Max (June 25), iOS 27 Beta 2 surfaces Baidu Visual Search (June 22), A20 commits to 2nm + WMCM + LPDDR6. Apple's 2026–2027 hardware story is now clearly on the iPhone, with Mac waiting until 2027.
TSMC gets the N2 ramp customer. Samsung/SK Hynix LPDDR6 lines get pulled forward — neatly matching last week's $648B Korean expansion.
via Wccftech / AppleInsider
The packaging change matters more than the node. PoP saved board area but trapped heat above the CPU/GPU — the iPhone 15 Pro thermal complaints and iPhone 16 Pro gaming throttle came from that wall. With WMCM, the heatspreader sits directly on the SoC, no DRAM in between.
Bandwidth roughly doubles — from ~50–60 GB/s (A19) to ~90 GB/s (A20). The reason isn't speculation: Apple Intelligence on-device models, Visual Search inference, and the new SystemVoiceAssistant in iOS 27 Beta 2 are all memory-bandwidth bound. For comparison, the leaked M6 base sits at 200 GB/s — a phone chip is closing on M3 territory.
Jeff Pu's numbers: ~15% faster, ~30% lower power than A19. The Neural Engine grows, with NPU area share climbing while package size stays the same.
The chain through the week is consistent: Apple skips M6 Pro/Max (June 25), iOS 27 Beta 2 surfaces Baidu Visual Search (June 22), A20 commits to 2nm + WMCM + LPDDR6. Apple's 2026–2027 hardware story is now clearly on the iPhone, with Mac waiting until 2027.
TSMC gets the N2 ramp customer. Samsung/SK Hynix LPDDR6 lines get pulled forward — neatly matching last week's $648B Korean expansion.
via Wccftech / AppleInsider
